Anode electronics status


(presented by N.Bondar, PNPI)
EMU meeting at CERN, Sep 11-12, 1999

		Anode Front-end Electronics current status.

1. Our goal was: 
	-Improve anode chip performance
	-Prepare 96 channels combined board for the test in CERN
	-Our ambitious plan was to prepare a prototype of 16 channels board 
	 for test in CERN.

2. What done:
	-Reason for oscillation was understood and fixed and two submissions
         of 16 channels chips (CMP16B and CMP16CC) was submitted and 
	 received.  (Chip CMP16B Layout) (Chip CMP16C Layout-not available)
	-96 channels "combined" board AD96D was designed in cooperation with 
         UCLA group.  (AD96D board view)
	-Special Test stand for testing our chips was designed and assembled. (Stand)
	-All chips were tested on the Stand (more than 1000 channels was 
         measued). We received understanding of the chip performance and 
         technological process stability (gain variation, threshold 
         distribution, propagation time distribution and so on). 
         See chip performance in  (CMP16B) and  (CMP16C) 
	 The best chips were installed on the AD96D boards.
 	-These boards were tested on bench (see in the page  CMP16C) 
	 and first results were received on the cosmic ray stand in Fermilab,
         (see N.Terentiev's talk on EMU meeting at UCLA, Apr 29-30, 1999,  Talk)
	-Few chips were irradiated in OSU with 5 sec radiation time step.
	 Each 5 sec is about 15-20 CMS years.  
	 Chip with 5 sec radiation dose was alive (measurement was performed 
	 after two weeks - time for delivery). 
	 Chips with 10 sec and 15 sec radiation dose became to work two more 
         weeks later. Chips with 20, 25 sec and more still dead.
	-Also a prototype of chip without delay - 8 channel amplifier-discriminator (CMP8) 
	 chip was submitted and received (picture of this chip - not available yet)
	-Two types of 16 channel boards were designed: 
         for 16 channel chip  (16 ch board)  and for 2 x 8 channel chips  (8+8 ch board)
	 Unfortunately these boards were made in the very end of July and   
	 tested very briefly on the bench. The results of these measurements 
	 were very optimistic - on bench this chip can work without 
         oscillation up to the noise level.

3. On GIF:

	-Four AD96 channel "combined"  boards were installed and tested. After
         fixing most of  "grounding and shielding" problems the noise level 
	 became about 2fC (It is pretty close to that we have in Fermilab). 
	 These board can work at the threshold as low as 20fC (view  AD96D
	 and  AD16 on the P2" chamber at GIF, CERN)         
	-Then the 16 channel boards were installed on the chamber and tested. 
	 Result of this test is the next - the 16 channels board with CMP8 
         chips (without "digital" part inside the chip) looks very stable. 
         It works without problems with threshold 20fC and it is possible to 
         set threshold even lower (we have to try it).
	 Other problem - the chamber becomes nosier with higher voltage and it
         seems that we need to increase the threshold with increasing the 
         high voltage.
	 First results of the measurement were presented by N. Terentiev   (talk).

4. September submission :

	-Submitted new 16 channels chip with improvement we discussed in summer
         (test  feature, reliability, power consumption).
	-Submitted new 16 channels chip - the same but without delay inside 
         the chip. We would like to compare these two options in the same 
	 conditions to make the final conclusion. (picture not available yet)
	-Submitted a prototype of one more chip - LVDS receiver and converter 
         to TTL with a controlled delay.(Picture not available yet)
	 Reasons for this chip:

		* The cost for LVDS receiver plus extra cable is about the same
                  like for this chip.
		* It allows us to improve the anode frond-end performance:
		  -remove  noisiest  "digital" parts from the analog part and 
		   make the chip more stable;
		  -decrease power consumption of the anode front-end up to 
		   30mW/channel (just now 40mW/channel).

		* As far as this new chip already is a digital chip it is 
		  possible to implement more digital features in it:
		  -increase number of bits to control delay and decrease one 
		   step value (4 bits delay control word was implemented, it 
		   means 16 divisions per 2ns - common delay 32ns);
		  -organize serial line to download delay data into the chip 
		   to simplify slow control network;
		  -control even each channel individually.


5. Before mass production we need to do:

	-Measure new chips and make final conclusion what chip is ready for production.
	-Modify 16 channels board according the latest agreements.
	-Finalize "Integration" technical problems
	-Perform more detailed radiation test
	-Perform measurements to estimate the chip reliability, production 
	 efficiency, parameters consistency
	-Design mass production measurement procedure (what measurements will 
	 be performed directly in wafer during production and what we need to do after).


bondar@fnal.gov (HTML version - teren@fnal.gov)
Last modified: Oct 22 11:00:00 CST 1999