Performance of the CMP16B chip
(Pass1 and Pass2 data from ASIC Chip Test Stand at Fermilab)


  • Introduction.

    • The ASIC chips CMP16B (Nov. 1998 submission, total 74 chips) have been tested on the ASIC chip test stand at Fermilab in Apr-May, 1999. The first results of the test were presented in N.Bondar's talk on the meeting in UCLA (Talk).
    The first pass thru the chips (Pass1) included measurements of thresholds and noise at JTAG(threshold)=125,130 and 135 with input capacitance Cin=180 pF and zero delay. From these data the gains and discriminator offsets were found as well. The time measurements were done with JTAG=135 and Cin=180 pF. Mean time and time resolution at Qin=100 fC and slewing time at Qin=100-900 fC were obtained. From total 74 chips two chips were completely dead (## 23 and 74), chip #50 had 1 dead channel and chip #58 - 2.
    For the Pass2 the 56 chips have been chosen by N.Bondar (##9,12-19,21,24-26,28-49,51-57,59-60,62-73) with all working channels. Each of them was measured approximately at one and the same threshold, near the minimum threshold (the corresponding JTAGs were set for each chip). The slewing time was measured at Qin=50-600 fC.
    After Pass2 24 chips were installed (soldered) on AD96 boards (boards ##3-5, on the board #1 - after Pass1). Data were taken again from these boards on the test stand, with Cin=180 pF.

  • Data from Pass1.

    • Threshold, noise, gain and discriminator offset are in Fig.1(see also the table below):
    PageHistograms
    1 Threshold and noise distributions in fC (per channel) , JTAG=135
    2-6 Thresholds per channel (fC), chip by chip, JTAG=135
    7-11 Noise per channel (fC), chip by chip, JTAG=135
    12 Threshold and noise per channel vs chip number, JTAG=135
    13 Average threshold and noise vs chip number, JTAG=135
    14 Threshold and noise residual distributions in fC, (per channel), JTAG=135
    15 Chips with threshold or noise residuals more than 3 sigma , JTAG=135
    16 Threshold and noise per channel, all chips, JTAG=135
    17 Discr. threshold (mV) vs JTAG code
    18-19 Discr. threshold in fC vs threshold in mV, chips 1 and 2
    20-24 Gain (mV/fC) per channel, chip by chip
    25-29 Discr. offset (mV) per channel, chip by chip
    30 Gain and discr. offset distributions
    31 Gain and discr. offset per channel vs chip number
    32 Gain and discr. offset residuals per channel vs chip number
    33 Average gain and discr. offset vs chip number

    Mean time at Qin=100 fC and slewing time at Qin=100-900 fC, Fig.2 and the table below:
    PageHistograms
    1 Mean time and slewing time per channel
    2 Mean time and slewing time per channel vs chip number
    3 Average mean time and slewing time vs chip number
    4 Mean time and slewing time, residuals
    5 Chips with mean time and slewing time residuals out of +-3 sigma
    6 Mean time and slewing time per channel, all chips

    Time resolution at Qin=100 fC, Fig.3 and the table:
    PageHistograms
    1 Time resolution (RMS) per channel and max RMS deviation
    2 Time resolution (RMS) per channel and max RMS deviation vs chip number
    3 Average time resolution (RMS) per channel and max RMS deviation vs chip number
    4 Residuals for time resolution (RMS) per channel and max RMS deviation vs chip number
    5 Chips with residuals of time resolution (RMS) per channel and max RMS deviation more than +- 3 sigma
    6 Time resolution (RMS) vs channel, all chips

  • Data from Pass2.

    • Threshold and noise, Fig.4 and the table:
    PageHistograms
    1 Threshold and noise per channel distribution
    2-5 Threshold per channel, chip by chip
    6-9 Noise per channel, chip by chip
    10 Threshold and noise per channel vs chip number
    11 Aver. threshold and noise, JTAG code vs chip number
    12 Aver. threshold and noise, JTAG code distributions
    13 Threshold and noise residuals
    14 Chips with threshold and noise residuals more than +3 sigma
    15 Threshold and noise per channel vs channel number, all chips

    Mean time at Qin=100 fC and slewing time at Qin=50-600 fC, Fig.5 and the table:
    PageHistograms
    1 Mean time and slewing time per channel
    2 Mean time and slewing time per channel vs chip number
    3 Average mean time and slewing time vs chip number
    4 Mean time and slewing time, residuals
    5 Chips with mean time and slewing time residuals out of +-3 sigma
    6 Mean time and slewing time per channel, all chips

  • Summary of results from Pass1 and Pass2.

    • (Mean and Sigma are parameters from the gaussian fit)
    Pass # ParameterMean SigmaComments
    1 Threshold (fC) at JTAG=135 36.9 6.3 Threshold distribution for all channels in all chips, see p. 1 in Fig.1
    - Noise (fC) at JTAG=135 1.3 0.09 Noise distribution for all channels in all chips, see p. 1 in Fig.1
    - Threshold (fC) at JTAG=135, residual - 1.6 Threshold residual distribution for all channels in all chips, see p. 14 in Fig.1. The residual for the given channel was calculated as the difference between the threshold in the channel and the average threshold for given chip.
    - Noise (fC) at JTAG=135, residual - 0.08 Noise residual distribution for all channels in all chips, see p. 14 in Fig.1. The definition of residual is the same as for the threshold.
    - Gain, mv/fC, all channels, all chips 4.2 0.4 See p. 30 in Fig.1.
    - Discriminator offset, mv, all channels, all chips 107 21 See p. 30 in Fig.1.
    - Gain, mv/fC, residual - 0.13 See p. 31 in Fig.1.
    - Discriminator offset, mv, residual - 4.8 See p. 31 in Fig.1.
    - Slewing time, nsec, Qin=100-900 fC 6.3 1.0 See p. 1 in Fig.2. No tuning to decrease the slewing time.
    - Slewing time, nsec, residual - 0.44 See p. 4 in Fig.2.
    - Mean time per channel, nsec, residual - 1.0 See p. 4 in Fig.2.
    - Time resolution (RMS), nsec, at Qin=100 fC 0.56 0.08 See p. 1 in Fig.3.
    - Time resolution (RMS), residual, nsec, at Qin=100 fC - 0.08 See p. 4 in Fig.3.
    2 Threshold (fC) 12.4 1.0 Threshold distribution for all channels in all chips, see p. 1 in Fig.4
    - Noise (fC) 1.07 0.25 Noise distribution for all channels in all chips, see p. 1 in Fig.4
    - Threshold (fC), residual - 0.6 Threshold residual distribution for all channels in all chips, see p. 13 in Fig.4.
    - Noise (fC), residual - 0.25 Noise residual distribution for all channels in all chips, see p. 13 in Fig.4.
    - Slewing time, nsec, Qin=50-600 fC 2.07 0.38 See p. 1 in Fig.5. After tuning.
    - Slewing time, nsec, residual - 0.22 See p. 4 in Fig.5.
    - Mean time per channel, nsec, residual - 0.6 See p. 4 in Fig.5.

  • Data from the chips installed on the boards AD96 #1,3,4,5

    • The assignment of the chips to the boards is the following:
    Board #Chips (positions 1-6)
    1 03 20 02 22 04 27
    3 12 14 39 43 63 64
    4 18 30 40 48 62 69
    5 05 06 07 08 10 11

    Threshold and noise, Fig.6 and the table:
    PageHistograms
    1 Threshold and noise per channel distribution
    2-3 Threshold per channel, chip by chip
    4-5 Noise per channel, chip by chip
    6 Threshold and noise per channel vs chip number
    7 Aver. threshold and noise, JTAG code vs chip number
    8 Aver. threshold and noise, JTAG code distributions
    9 Threshold and noise residuals
    10 Chips with threshold and noise residuals more than +3 sigma
    11 Threshold and noise per channel vs channel number, all chips
    12 Threshold and noise per channel vs chip position on the board, all boards
    13 Threshold and noise per channel vs board number, all chips
    14 Threshold per channel vs channel number of the board, for each board.
    15 Noise per channel vs channel number of the board, for each board.

    teren@fnal.gov bondar@fnal.gov
    Last modified: Mon Jun 07 11:30:00 CST 1999