The 16 channel delay chips D16G (
Ref. 1) provide programmable
time delay of the ALCT (
Ref. 2) input signals coming
from the CMS muon endcap CSC anode front end boards. Here we present the status and results of the mass production test of these chips. The status of chips
delivery to UCLA for ALCT boards assembly is given as well. This page
helps to monitor the performance of the delay chips. It also provides
information needed for the tuning parameters of the chips installed on the
ALCT board. The parameters of the chip were measured at Uc=0 mV.
Description of the distributions of the delay chip parameters in Fig. 1
(before applying selection cuts) given in Table 1 is
here. The cuts are shown as red
lines.For chips from trays 1-16 we used cuts from
Cut List #4 and starting from
tray 17 -
Cut List #5. Also, starting from tray 17, the data have been analyzing online on the delay chips test stand.
The chips that passed the selection cuts have parameters
distributions given in Fig.2. The overall status of the test presented in
Due to spread of the parameters the delay chips were divided
on 9 groups having each 2 ns wide bin in the averaged over chip delay(code=15)
distribution (Page 5 in Fig.2). As an example for the chips from trays 1-16 the
list of the groups is given
In this list D0 is the averaged over all chips in the group
delay at code 0, delay(0), D15 - the same for delay(15). SLP is the slope
MxD is the maximum absolute deviation of the delay in the group from predicted
delay defined as D0 + Code*SLP where the Code is the delay code (0-15).
MxW is the maximum width of the road (delays of all
channels from all chips in the group at given delay code) over all delay codes.
All delays are absolute delays in the chips (the test
stand delays were subtracted). The chips from groups with
numbers less than 8 can be tuned on the ALCT board after assembling to get
the same average delay at code of 15 as in group #8. Increasing the Uc
voltage by 50 mV raises D15 by 0.8-1.1 ns. The chips from groups 1,2 and
9 (of total about 10%) will not be used for installation on the ALCT boards.
Table 2 presents the distributions of the parameters for each group.
The total number available for the test chips was 23,515 (trays 1-149). They were tested in the first pass. Chips in tray 150 and beyond are the chips which failed in the first pass and have been remeasured.
The time stability of the delay chips test stand is shown in Table 3. The
first page has the plots of relative changes in the averaged for each tray
chip delays at the delay code of 0 (in slot 1 and 2). The second page shows
stability of residuals for each channel.
Table 4 is monitoring the delivery schedule of the chips from each group.