Talk -
Talk transparencies
Requirements on Maximum Time Smearing.
Fig.1_1 -
the single plane drift time at different sigmas of delay smearing
Fig.1_2 -
the 1-st, 2-nd ,.... and 6-th hit arrival time distribution at
delay smearing sigma = 0 nsec.
Fig.1_3 -
the 1-st, 2-nd ,.... and 6-th hit arrival time distribution at
delay smearing sigma = 15 nsec.
Fig.1_4 -
the bunch crossing efficiency in 25 nsec gate for the 1-st, 2-nd,... and 6-th
hit arrival
at different delay smearing sigmas.
Fig.1_5 -
the bunch crossing efficiency and inefficiency in 25 nsec gate for the 2-nd
hit arrival
vs delay smearing sigma.
Fig.1_6 -
the mean time of the 2-nd hit arrival vs delay smearing sigma.
Requirements on Maximum Percentage of Bad Channels.
Fig.2_1 -
the bunch crossing inefficiency for the 2-nd arrival vs anode front end
failure probability.
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Last modified: Thu June 15 13:40:00 CST 2000